For example, the crank of an engine has a crank sensor that periodically generates a pulse at each predetermined angle, and the signal from that crank sensor is used for controlling the engine. When the crank sensor generates a pulse every 30 degrees, a crank angle in multiples of 30 degrees, that is, 0 degree, 30 degrees, 60 degrees, and so on, can be detected by the crank sensor. However, an intermediate crank angle, such as 15 degrees and 45 degrees, cannot be detected directly by this crank sensor. To detect an intermediate crank angle, an interrupt generation circuit is used that uses the signal from the crank sensor as an external signal from the monitored object to estimate the current crank angle and, when the crank angle is estimated to reach a desired angle, generates an interrupt.
FIG. 3 is a diagram showing the configuration of a conventional interrupt generation circuit that performs the operation described above, and FIG. 4 is a timing chart showing an example of the operation. The external event signal is a pulse signal generated periodically but not at a regular interval. The first pulse of the external event signal corresponds, for example, to the crank angle of 30 degrees, and the next pulse to the crank angle of 60 degrees. This interrupt generation circuit 200 measures time from a moment an effective edge (rising edge or falling edge) of an immediately preceding external event signal is detected to a moment an effective edge of the current external event signal is detected and, based on the measured time, estimates a period of time that will elapse from the moment the effective edge of the current external event signal is detected to a moment an effective edge of the next external event signal is detected. When the crank angle is thought to reach a desired position, the interrupt generation circuit generates an interrupt.
An external event detection unit 201 detects the effective edge of the external event signal and outputs an external event detection signal. The effective edge period of the external event signal becomes shorter as the rotations of the engine increases. A first sub-timer 202, which receives a clock signal, counts the pulses of the clock signal from the time the effective edge of the external event signal is detected by the external event detection unit 201 to the time the effective edge of the next external event signal is detected.
The count value stored in the first sub-timer 202 when the external event detection unit 201 detects the effective edge of the external event signal corresponds to a period of time from a moment an immediately preceding effective edge of the external event signal is detected to a moment a current effective edge is detected. Based on the timer value, which is stored in the first sub-timer 202 when the external event detection unit 201 detects the effective edge of the external event signal, and the preset number N, a count period generation circuit 203 generates an external event division signal having N pulses. The period of each of N pulses is equal to 1/N of the effective edge period.
The external event division signal is counted by a second sub-timer 204 and a main timer 205. Because the external event division signal has a period equal to 1/N of the time interval of an immediately preceding external event signal, a period of time required from the moment the second sub-timer 204 and the main timer 205 start counting pulses of the external event division signal to the moment the N pulses are counted indicates the time interval of the period of the immediately preceding external event. If the time interval of the current external event period equals the time interval of the immediately preceding external event period, the count value stored in the main timer 205 corresponds to a crank rotation angle that has advanced from the moment the pulse of the external event signal is generated. For example, if the count value of the main timer 205 is N/2, it indicates that the crank angle at this time is 15 degrees advanced from the moment the pulse of the external event signal is generated.
A compare register 206 stores a desired value corresponding to a crank angle at which an interrupt is to be generated. If the count value stored in the main timer 205 equals the value stored in the compare register 206 in which a desired value is stored, the interrupt generation circuit 200 immediately generates a compare interrupt (signal). For example, if “N/2” is stored in the compare register 206 after the pulse of the external event signal indicating the crank angle of 30 degrees is generated, the interrupt generation circuit 200 generates an interrupt when the count value of the main timer 205 reaches “N/2” and the crank angle estimated from the count value reaches 45 degrees.
When the time interval of the current external event period is shorter than the time interval of the immediately preceding external event period, the external event detection unit 201 detects an effective edge of the next external event signal before a count value stored in the main timer 205 and the second sub-timer 204 reaches a maximum value. If the main timer 205 is cleared at the same time the second sub-timer 204 is cleared when an effective edge of the external event signal is detected, the count value stored in the main timer 205 cannot be made equal to a value stored in the compare register 206 and thus an interrupt cannot be generated at a crank angle at which an interrupt is to be generated. Therefore, this circuit is configured in such a way that the count value stored in the main timer 205 is cleared only when that the count reaches the maximum value.
The count value in the second sub-timer 204 is cleared to 0 when the effective edge of the pulse of the external event signal is detected. Therefore, if the effective edge of the pulse of the external event signal is detected before the count value of the main timer 205 reaches a maximum value, the count value of the second sub-timer 204 becomes not equal to the count value of the main timer 205. In this case, a high-level clock switching signal is input to a selector 207, and the clock signal that is a shortest-period pulse signal in the interrupt generation circuit 200 is input to the main timer 205 via the selector 207. This causes the main timer 205 to increase the count value quickly.
If the count value of the main timer 205 does not yet reach the value stored in the compare register 206 when the effective edge of the pulse of the external event signal is detected, the compare interrupt is not yet generated. If the main timer 205 counts the clock signals to increase the count value quickly and the count value of the main timer 205 becomes equal to the value stored in the compare register 206, the compare interrupt is generated immediately. The count value of the main timer 205 is increased to the maximum value and then the count value is cleared.
Even while the main timer 205 counts the clock signals, the second sub-timer 204 keeps counting the external event division signals generated by the count period generation circuit 203. If the count value of the main timer 205 becomes equal to the count value of the second sub-timer 204, the clock switching signal goes low and the main timer 205 restarts counting the external event division signals output from the count period generation circuit 203. The technology that uses the counters and the compare register described above is described, for example, in Non-Patent Document 1.
[Non-Patent Document 1]
SH-2E SH7058F-ZTAT Hardware Manual (Doc No. RJJ09B0019-0200H) 11-172 to 11-179 (pp. 378 to pp. 385)